This invention relates to electronic circuits for analog-to-digital conversion and, more particularly, to an improved A/D converter circuit and technique.
Various types of circuits exist in the art for the important task of analog-to-digital conversion, but existing approaches suffer one or more disadvantages. So-called "dual-slope" A/D converters, commonly used in digital multimeters and other applications, can achieve high resolution, but are very slow. [See, for example, F. H. Musa et al., "A CMOS Monolithic Three And A Half Digit A/D Converter", IEEE Int'l. Solid State Circuits Conf., pp. 144-145, 1976.] At the other extreme are A/D converters based on the so-called "flash" technique [see e.g. J. G. Peterson, "A Monolithic Video A/D converter", IEEE Journal of Solid State Circuits, SC-14, No. 6, 932-937, Dec. 1979] in which for an N-bit A/D converter the input signal is simultaneously compared with 2.sup.N -1 reference voltages using 2.sup.N -1 comparators to generate 2.sup.N -1 outputs. The flash A/D converter also contains a rather complex digital circuit for converting the 2.sup.N -1 outputs from the comparators to N-bits of binary information. Thus, complexity is an obvious drawback of this approach. An alternative to the flash A/D converter has been proposed which utilizes a folding or sawtooth characteristic to achieve high speed [see A. Arbel et al., "Fast ADC", IEEE Trans. on Nuc. Sci., NS-22, 446, 1975]. However, this approach has not been widely accepted because of the need for a complex circuit to obtain the folding characteristic.
It is among the objects of the present invention to provide an A/D converter which is fast and accurate, but not unduly complex.